Monday, July 25, 2011

Fwd: Tech Focus: Hardware languages for softies

I'd bet most software people realize that we are almost a the point of pure code to hardware design.

---------- Forwarded message ----------
From: " Newsletter" <>
Date: Jul 25, 2011 9:08 AM
Subject: Tech Focus: Hardware languages for softies
To: <>

»Click here to view online I »Forward to a friend I »Sign up for an EE Times Newsletter

Share this Newsletter:


July 25, 2011

Tech Focus: Hardware languages for softies


A guide to VHDL for embedded software developers: Part 1 – Essential commands

Using SystemC to build a system-on-chip platform

The four Rs of efficient system design

Compiling software to gates

Editor's Note

Bernard Cole Bernard Cole
Site Editor
Read his blog

Every once in a while I find myself caught in the crossfire of debates between embedded systems developers about the pros and cons of C versus C++, C/C++ versus Java, or model-driven versus model-based software design frameworks. At those times I try to remember the advice of columnists Jack Ganssle and Michael Barr: there are no good languages or bad ones, just imperfect languages that may be more or less suitable to the task at hand.

One area where such advice should also be heeded is where the dichotomy is the widest. That is the one between developers using languages such as C or C++ to write software programs to run on microprocessors and those who use hardware design languages to build the actual gates and logic for the CPU, ASIC or FPGA hardware.

This is ironic because, in an effort to make hardware design easier for both hardware and software designers, the industry has borrowed heavily from software languages. The original VHDL for ASICs and FPGAs borrows heavily from Ada, Verilog is based on C, SystemC borrows heavily from C++, and Handel-C uses a rich subset of C. There is even a hardware language based on Java, called Lava, and another called MyHDL which used the Python Web programming language to generate either Verilog or VHDL descriptions.

So when you get right down to it even the hardware is software and developers in both worlds face the same sets of challenges: writing the code, compiling, debugging, simulating and verifying it. And, now, there are frameworks such as ESL, which abstract the design process to the system level.

In this issue of the Tech Focus newsletter is a selection of articles written over the past few years to help reluctant software developers make the transition. Of these, my Editor's Top Picks are:

A guide to VHDL for software developers
Design languages for embedded systems
Transitioning from C/C++ to SystemC

With the emergence of such things as FPGAs with integrated CPU cores and processors with FPGA blocks, the boundary between hardware and software will become even more indistinct. This makes it more important than ever to have the skills to move back and forth as easily as possible.

Design How-Tos

A guide to VHDL for embedded software developers: Part 1 – Essential commands

A series of three articles for embedded software developers unfamiliar with VHDL that is designed to give concise and useful summary information on important language constructs and usage - helpful and easy to use, but not necessarily complete. Part 1: Essential commands.

Using SystemC to build a system-on-chip platform

How Texas Instruments' designers used the SystemC hardware design language to do performance modeling when creating both the company's OMAP-2 platform and the devices based on it.

Transitioning from C/C++ to SystemC in high-level design

It's far easier to do architecture design in SystemC than it is to do it in C and C++. If co-designing hardware and software using high-level design methods, much of your work will be done in an architecture design phase in SystemC. Here's why.

Design Languages for Embedded Systems

Synopsys' Stephen A. Edwards provides a short tutorial on the basics of some of the most important languages, along with examples of each, that will help you decide which one to investigate for your particular embedded application.

Accelerating algorithms in hardware

When you're trying to get the best performance out of your algorithm and you're out of software tricks, try acceleration through hardware/software repartitioning. FPGAs provide everything you need to speed up your algorithms. Lara Simsic shows you how.

Compiling software to gates

Are VHDL and Verilog past their prime, soon to be replaced by C-like design languages such as System C, Handel-C, and others? Professor Ian Page thinks a change is at hand.

The four Rs of efficient system design

New design languages and new chips and systems mean a whole new set of design gotchas for today's developers. Once-simple tasks become difficult and, thankfully, once-difficult tasks become easy. This article for senior designers looks at newer high-level design techniques and how they can improve logic and system design.

Taking System Design to a Higher Level

Keys to raising the design level are the availability of different design methodologies coupled with design tools that can navigate designs at abstraction levels above RTL.

FPGA programming step by step

FPGAs and microprocessors are more similar than you may think. Here's a primer on how to program an FPGA and some reasons why you'd want to.

The art of FPGA construction

Working with FPGAs isn't intimidating when you know the basic techniques and options.

Hardware Design Requires Hardware Design Languages

While languages such as C++ can help in the creation of high-level models of hardware, Sean Dart argues that hardware engineers need specific language constructs in languages such as SystemC that allow them to express their intent in the most accurate and productive manner.

Accellera VHDL Standard

The article describes the salient features of the Accellera VHDL STandard 1076-2006-D3.0

An overview of SystemVerilog 3.1

SystemVerilog 3.1 adds a number of features to the Verilog-2001 standard that facilitate modeling and verification of large systems. In this tutorial, consultant Stu Sutherland provides an overview of some of the more significant new features, and argues that SystemVerilog is ready for adoption and use.

Address system-level HW/SW design tasks with Electronic System Level tools

To keep track of design size and complexity, designers are now looking for the next breakthrough in design productivity, implementation and verification. One answer may be electronic system level design.

Embedded Systems Bookshelf


Embedded Books Reading Room
Bernard Cole's favorite links to book excerpts.


Engineer's Bookshelf
Airport fiction blows. A look at books other engineers are reading and why you should read them, too. Recommend and write a review yourself. E-mail Brian Fuller.

Jack Ganssle's Bookshelf
A list of book reviews by Jack Ganssle, contributing technical editor of Embedded Systems Design and

Max's Cool Beans
Clive "Max" Maxfield, the editor on Programmable Logic DesignLine, often writes about interesting books.


Mentor extends embedded design into ESL

Common Embedded Software Development Platform integrates electronic system level (ESL) capabilities into CodeSourcery tools to support development from virtual prototypes to hardware emulation and boards.

New ESL platform claimed to cut design times in half

Agilent Technologies' new electronic system-level (ESL) EDA platform is said to help algorithm developers and system architects cut design time in half.

CoFluent bridges gap from UML to SystemC

French ESL company CoFluent Design (Nantes, France) claimed it has developed a methodology that combines the OMG's (Object Management Group) standards UML (Unified Modeling Language), SysML (System Modeling Language) and MARTE (Modeling and Analysis for Real-Time and Embedded Systems) profiles.

SystemC synthesis tool adds improved C++ support

Celoxica Holdings said it has enhanced C++ coding support in its Agility Compiler high-level design tool, raising the level of design abstraction above SystemC for designers who need to boost productivity and for programmers less familiar with hardware design.

C/C++ to VHDL for $995

Will C/C++ become a standard for modelling hardware and software systems?

HDL Designer Series Supports SystemVerilog

Mentor Graphics Corporation announced that its HDL Designer Series product has been extended to provide a platform for implementing SystemVerilog.

Search over 4.5 million parts online with Avnet Express! and its Design Resource Center help customers find and purchase electronic components and development tools with just a few clicks of the mouse. Our extensive online catalogue includes over 1 million parts available in quantities of 1 and same day shipping.
Visit now!


Verilog versus VHDL (which is best?)

A reader who knows a little Verilog and a little VHDL is trying to plot his future course; which language should he learn in detail?

Three cool beginners' books on VHDL

While responding to a question from a student, I discovered the answer in our very own Programmable Logic DesignLine forums.

The ESL dilemma

When ESL first started to emerge I knew it would apply here as well, but was unsure about the outcome. Would Mentor, Synopsys, and Cadence fall into insignificance?

Does ESL need another language?

Systems architects need to describe the requirements and architecture of a system without the limits imposed by a presumed implementation choice. Some of the projects aiming to develop a true architectural language for the ESL market show both technical and financial promises.

Is EDA stuck between a rock & a soft place?

The dilemma facing IC designers & suppliers of EDA hardware tools as they struggle to meet the software demands of new designs can best be described as being caught "between a rock and a soft (ware) place."

Is low power driving move to integrated HW/SW codesign?

While many pressures are driving embedded developers to higher level tools to integrate hardware/software design, debug and verification, is the most potent factor the need for lower power designs that do not sacrifice performance?

Sponsored White Papers

VHDL Coding Style to Infer LatticeECP2 sysDSP Blocks with Precision

Off to the Races with Your Accelerated SystemVerilog Testbench

Introduction to Verilog

Overview of Digital Design with Verilog HDL

Digital System Design Automation with Verilog

Using System Generator for Systematic HDL Design, Verification, and Validation

Courses and Webinars

Harness the Power of SystemVerilog with Design Compiler to Increase Productivity

ESC SV-282- A Methodology for Successful VHDL-Based FPGA Design

Fundamentals of ESL Synthesis

ESC SV-283- Making System-Level Hardware and Software Tradeoffs

Conquer FPGA Design Complexity with System-Level Integration


Around the Network Events

VHDL design projects (VIDEOS!!)

Verilog design projects (VIDEOS!!)

ESC Silicon Valley 2011: THE VIDEO!! Newsletters (BACK ISSUES)

The ultimate electronics road trip has begun! Join the adventure at
where you can follow content from the road trip, access a drive tracker and an interactive
map highlighting the tour as well as participate in games, prizes and weekly contests! For a
chance at winning this week's prize go to:

Conferences and Events

ESC Boston 2011
Conference: September 26-29
Expo: September 27 & 28

Register now for the All Access Pass and receive a BeagleBoard-xM and eZ430 Chronos watch, as well as exclusive access to: DesignCon East, DesignMED and Designing with LEDs!  Expo Pass registration is FREE.

Check out what's new with ESC Boston:

Don't miss your opportunity to attend the hottest embedded event of the Fall.

Register Now!

* Available to the first 40 people who register for the All Access Pass only. Must attend to receive.

News & Analysis

The evolution of design methodology

In nature, long periods of relatively stable environments are occasionally punctuated by large-scale changes that are the catalyst for evolution to create a large variety of mutations, and then for natural selection to weed out the unsuccessful ones. The environment in which design methodology lives is similar.

Evolution of design methodology II: The re-aggregation era

Part two of the two-part essay co-authored by Paul McLellan and Jim Hogan about evolving design methodology and how it will change the industry.

The ESL battle for hearts and minds

Things have turned deadly serious this week between two major players in the ESL market, Mentor Graphics and Forte Design Systems.

ARM, Xilinx to collaborate on programmable systems

FPGA vendor Xilinx Inc. (San Jose, Calif.) and ARM Holdings plc (Cambridge, England) have announced they are collaborating to enable ARM processor and interconnect technology to be implemented within Xilinx FPGAs.

Altera, MIPS roll FPGA-optimized soft processor

Altera, MIPS Technologies and System Level Solutions introduced a MIPS-based FPGA optimized soft processor for use on Altera's FPGAs and ASICs to create solutions for networking, video and digital signal processing applications.

ARM, Actel combine forces on soft 'Thumb' for FPGA

U.S. FPGA vendor Actel Corp. has struck a deal with processor IP licensor ARM Holdings plc whereby Actel customers are to set to be able to implement a soft ARM7 Thumb microprocessor on a range of ARM technology-enabled FPGAs due to come out some time in 2005.

Cypress plans bigger, faster, cheaper PSoC chips

Lifting the covers a bit on Cypress Microsystems' road map for its unique PSoC family of programmable embedded devices, director of strategic marketing Nathan John recently announced that the company will release three new subfamilies of PSoC parts by the end of this year, all extensions of the current PSoC architecture.

This email was sent to:

To subscribe to UBM Electronics emails or change your email preferences please click here.

Go to
A UBM Electronics Newsletter © 2011. All rights reserved.
Privacy Policy I Advertising Information I Unsubscribe
UBM Electronics, 303 Second Street, Suite 900 South, San Francisco, CA 94107

1 comment:

Unknown said...

Great post on "Fwd: Tech Focus: Hardware languages for softies". I really appreciate your knowledge on it. thanks

Video conferencing solutions