Sunday, July 31, 2011

What's Needed For Freedom In the Cloud? - Slashdot

http://news.slashdot.org/story/11/07/30/2046206/Whats-Needed-For-Freedom-In-the-Cloud

Friday, July 29, 2011

user-space-ip.c

This some quick and dirty test code that creates a userspace virtual IP network interface.
 
Currently it arp's and ping's and can send and receive UDP, which is fine for RTP based video and audio.
I wanted to setup some user space TCP/IP stack like Apline or LWIP and make a web server,

The MAC address is hard coded.
The network card in put promiscuous mode so DO NOT RUN THIS ON A HEAVILY LOADED SERVER.
It uses raw sockets so it must run as root.
It's only been tested on Linux.


/*****************************************************************************
 *   Copyright   John Sokol (C) 2004 
 *   You may use this code as long as you credit me and link to videotechnology.com
 *****************************************************************************/
#include
#include
#include <stdlib.h>
#include <errno.h>
#include <unistd.h>
#include <sys/socket.h>
#include <sys/types.h>
#include <linux/in.h>
#include <linux/ip.h>
// #include
#include <linux/icmp.h>
#include <linux/if_ether.h>
#include <linux/if_arp.h>
#include <linux/if_packet.h>
#include <sys/ioctl.h>



// Evil Globals

/*our MAC address*/
unsigned char src_mac[6] = { 0x00, 0x0c, 0xf1, 0x75, 0xf8, 0xaa };      // Bogus
unsigned char src_ip[4] = { 192, 168, 0, 88 };  // Bogus

/*other host MAC address*/
unsigned char bcast_mac[6] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };    //Broadcast

unsigned char dest_mac[6] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };     //Broadcast
unsigned char dest_ip[4] = { 255, 255, 255, 255 };      // Bogus

unsigned char arp_query_ip[4] = { 192, 168, 0, 16 };    // Bogus



u_int16_t
csum_partial (void *buffer, unsigned int len, u_int16_t prevsum)
{
  u_int32_t sum = 0;
  u_int16_t *ptr = buffer;

  while (len > 1)
    {
      sum += *ptr++;
      len -= 2;
    }
  if (len)
sokol@server:~$
sokol@server:~$
sokol@server:~$
sokol@server:~$ cat user-space-ip.c
#include
#include
#include <stdlib.h>
#include <errno.h>
#include <unistd.h>
#include <sys/socket.h>
#include <sys/types.h>
#include <linux/in.h>
#include <linux/ip.h>
// #include
#include <linux/icmp.h>
#include <linux/if_ether.h>
#include <linux/if_arp.h>
#include <linux/if_packet.h>
#include <sys/ioctl.h>



// Evil Globals

/*our MAC address*/
unsigned char src_mac[6] = { 0x00, 0x0c, 0xf1, 0x75, 0xf8, 0xaa };      // Bogus
unsigned char src_ip[4] = { 192, 168, 0, 88 };  // Bogus

/*other host MAC address*/
unsigned char bcast_mac[6] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };    //Broadcast

unsigned char dest_mac[6] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };     //Broadcast
unsigned char dest_ip[4] = { 255, 255, 255, 255 };      // Bogus

unsigned char arp_query_ip[4] = { 192, 168, 0, 16 };    // Bogus



u_int16_t
csum_partial (void *buffer, unsigned int len, u_int16_t prevsum)
{
  u_int32_t sum = 0;
  u_int16_t *ptr = buffer;

  while (len > 1)
    {
      sum += *ptr++;
      len -= 2;
    }
  if (len)
    {
      union
      {
        u_int8_t byte;
        u_int16_t wyde;
      } odd;
      odd.wyde = 0;
      odd.byte = *((u_int8_t *) ptr);
      sum += odd.wyde;
    }
  sum = (sum >> 16) + (sum & 0xFFFF);
  sum += prevsum;
  return (sum + (sum >> 16));
}


void
sendpack (int sock)
{

  struct sockaddr_ll socket_address;    /*target address */

  void *buffer = (void *) malloc (ETH_FRAME_LEN);       /*buffer for ethernet frame */
  unsigned char *etherhead = buffer;    /*pointer to ethenet header */
  struct ethhdr *eh = (struct ethhdr *) etherhead;      /*another pointer to ethernet header */
  unsigned char *data = buffer + 14;    /*userdata in ethernet frame */

  int send_result = 0;


/*prepare sockaddr_ll*/

/*RAW communication*/
  socket_address.sll_family = PF_PACKET;
/*we don't use a protocoll above ethernet layer ->just use anything here*/
  socket_address.sll_protocol = htons (ETH_P_ALL);

/*index of the network device see full code later how to retrieve it*/
  socket_address.sll_ifindex = if_nametoindex ("eth0");
  printf ("if index for eth0 = %d\n", if_nametoindex ("eth0"));

/*ARP hardware identifier is ethernet*/
  socket_address.sll_hatype = ARPHRD_ETHER;     // for recv only

/*target is another host*/
  socket_address.sll_pkttype = PACKET_BROADCAST;        // for recv only

/*address length*/
  socket_address.sll_halen = ETH_ALEN;
/*MAC - begin*/
  socket_address.sll_addr[0] = 0x00;
  socket_address.sll_addr[1] = 0x00;
  socket_address.sll_addr[2] = 0x00;
  socket_address.sll_addr[3] = 0x00;
  socket_address.sll_addr[4] = 0x00;
  socket_address.sll_addr[5] = 0x00;
/*MAC - end*/
  socket_address.sll_addr[6] = 0x00;    /*not used */
  socket_address.sll_addr[7] = 0x00;    /*not used */

  memcpy ((void *) socket_address.sll_addr, (void *) dest_mac, ETH_ALEN);

/*set the frame header*/
  memcpy ((void *) buffer, (void *) dest_mac, ETH_ALEN);
  memcpy ((void *) (buffer + ETH_ALEN), (void *) src_mac, ETHALEN);
  eh->h_proto = htons (ETH_P_ARP);


  data[0] = 0;
  data[1] = 1;                  // Hardware Type Ethernet
  data[2] = 8;
  data[3] = 0;                  // Protocol IP
  data[4] = 6;
  data[5] = 4;                  // Hardware size 6, protocol size 4
  data[6] = 0;
  data[7] = 1;                  // Opcode Request

  memcpy ((void *) &data[8], (void *) src_mac, ETH_ALEN);
  memcpy ((void *) &data[14], (void *) src_ip, 4);

  memset ((void *) &data[18], 0, ETH_ALEN);

  memcpy ((void *) &data[24], (void *) arp_query_ip, 4);



/*send the packet*/
  send_result = sendto (sock, buffer, 61, 0,
                        (struct sockaddr *) &socket_address,
                        sizeof (socket_address));

  if (send_result == -1)
    {
      printf ("error sending packet %d\n", errno);
      if (errno == ENOTSOCK)
        printf ("ENOTSOCK\n");
      if (errno == EAGAIN)
        printf ("EAGAIN\n");
      if (errno == ENOBUFS)
        printf ("ENOBUFS\n");
      if (errno == EINVAL)
        printf ("EINVAL\n");
      if (errno == EPIPE)
        printf ("EPIPE\n");
      if (errno == EMSGSIZE)
        printf ("EMSGSIZE\n");
      if (errno == EBADF)
        printf ("EBADF\n");
      if (errno == EFAULT)
        printf ("EFAULT\n");

    }


}



void
recvpack (int sock)
{
  char buffer[2048];
  unsigned char *iphead, *ethhead;
  char proto[10];
  int n;

  struct iphdr *ip;
  struct icmphdr *icmp;  //= (void *)((u_int32_t *)ip + ip.ihl );
  struct tcphdr *tcp;
  struct udphdr *udp;



  n = recvfrom (sock, buffer, 2048, 0, NULL, NULL);
  printf ("%d bytes read\n", n);

  /* Check to see if the packet contains at least
   * complete Ethernet (14), IP (20) and TCP/UDP
   * (8) headers.
   */
  if (n < 20)
    {                           // was 42
      perror ("recvfrom():");
      printf ("Incomplete packet (errno is %d)\n", errno);
      close (sock);
      exit (0);
    }

  ethhead = buffer;

  if (!memcmp(ethhead, (void *) src_mac, 6) || !memcmp(ethhead, (void *) bcast_mac, 6) )  // IS it for our MAC?
    {

      printf ("Destination MAC address: "
              "%02x:%02x:%02x:%02x:%02x:%02x\n",
              ethhead[0], ethhead[1], ethhead[2],
              ethhead[3], ethhead[4], ethhead[5]);
      printf ("Source MAC address: "
              "%02x:%02x:%02x:%02x:%02x:%02x\n",
              ethhead[6], ethhead[7], ethhead[8],
              ethhead[9], ethhead[10], ethhead[11]);


      if (ethhead[12] == 0x08 && ethhead[13] == 0x00)
        {

          iphead = buffer + 14; /* Skip Ethernet header */
          if (*iphead == 0x45) {  /* Double check for IPv4  and no options present */
              ip = (void *)iphead;

              printf ("Source host %d.%d.%d.%d\n",
                      iphead[12], iphead[13], iphead[14], iphead[15]);
              printf ("Dest host %d.%d.%d.%d\n",
                      iphead[16], iphead[17], iphead[18], iphead[19]);
              printf ("Source,Dest ports %d,%d\n",
                      (iphead[20] << 8) + iphead[21],
                      (iphead[22] << 8) + iphead[23]);

              sprintf (proto, "%d", iphead[9]);
              if (iphead[9] == IPPROTO_ICMP) {
                strcpy (proto, "ICMP");
                 icmp = (void *)iphead + 20;

                if (icmp->type == ICMP_ECHO) {
                                fprintf(stderr, "PONG!\n");
        u_int32_t tmp;
        char tbuf[10];
                                /* Turn it around */

  memcpy ( tbuf, (void *) (buffer + ETH_ALEN), ETH_ALEN);
  memcpy ((void *) buffer, (void *) tbuf, ETH_ALEN);
  memcpy ((void *) (buffer + ETH_ALEN), (void *) src_mac, ETH_ALEN);

                        //memcpy ((void *) tmp, (void *)&ip->saddr , 4);

                        tmp = ip->saddr;
                        ip->saddr = ip->daddr;
                        ip->daddr = tmp;

                        icmp->type = ICMP_ECHOREPLY;
                        icmp->checksum = 0;
                        icmp->checksum = ~csum_partial(icmp, ntohs(ip->tot_len) - ip->ihl*4, 0);

                        {
                                unsigned int i;
                        for (i = 44; i < ntohs(ip->tot_len); i++){
                                        printf("%u:0x%02X ", i, ((unsigned char *)ip)[i]);
                        }
                        printf("\n");

                     int send_result;
                     struct sockaddr_ll socket_address; /*target address */

    /*RAW communication*/
  socket_address.sll_family = PF_PACKET;
/*we don't use a protocoll above ethernet layer ->just use anything here*/
  socket_address.sll_protocol = htons (ETH_P_ALL);

/*index of the network device see full code later how to retrieve it*/
  socket_address.sll_ifindex = if_nametoindex ("eth0");
  printf ("if index for eth0 = %d\n", if_nametoindex ("eth0"));

/*ARP hardware identifier is ethernet*/
  socket_address.sll_hatype = ARPHRD_ETHER;     // for recv only

/*target is another host*/
  socket_address.sll_pkttype = PACKET_BROADCAST;        // for recv only

/*address length*/
  socket_address.sll_halen = ETH_ALEN;
/*MAC - begin*/
  socket_address.sll_addr[0] = 0x00;
  socket_address.sll_addr[1] = 0x00;
  socket_address.sll_addr[2] = 0x00;
  socket_address.sll_addr[3] = 0x00;
  socket_address.sll_addr[4] = 0x00;
  socket_address.sll_addr[5] = 0x00;
/*MAC - end*/
  socket_address.sll_addr[6] = 0x00;    /*not used */
  socket_address.sll_addr[7] = 0x00;    /*not used */

  memcpy ((void *) socket_address.sll_addr, (void *)tbuf , ETH_ALEN);

 sleep(2);
                     send_result = sendto (sock, buffer, n, 0,
                        (struct sockaddr *) &socket_address,
                        sizeof (socket_address));

  if (send_result == -1)
    {
      printf ("error sending packet %d\n", errno);
     }
                     //write(fd, &u, len);

                    }
                }

                }
              if (iphead[9] == IPPROTO_IGMP)
                strcpy (proto, "IGMP");
              if (iphead[9] == IPPROTO_TCP)
                strcpy (proto, "TCP");
              if (iphead[9] == IPPROTO_UDP)
                strcpy (proto, "UDP");

              printf ("Layer-4 protocol %s\n", proto);
              printf ("TTL %d\n", iphead[8]);
            }

        }
      else
       if (ethhead[12] == 0x08 && ethhead[13] == 0x06)
        {
          printf ("proto = ARP");
        }
      else
        printf ("proto = %02x:%02x\n", ethhead[12], ethhead[13]);
    }

}


int
main (int argc, char **argv)
{
  int sock;
  struct ifreq ethreq;

  if ((sock = socket (PF_PACKET, SOCK_RAW, htons (ETH_P_ALL))) < 0)
    {
      perror ("socket");
      exit (1);
    }

  /* Set the network card in promiscuous mode */
  strncpy (ethreq.ifr_name, "eth0", IFNAMSIZ);
  if (ioctl (sock, SIOCGIFFLAGS, &ethreq) == -1)
    {
      perror ("ioctl");
      close (sock);
      exit (1);
    }
  ethreq.ifr_flags |= IFF_PROMISC;
  if (ioctl (sock, SIOCSIFFLAGS, &ethreq) == -1)
    {
      perror ("ioctl");
      close (sock);
      exit (1);
    }

  sendpack (sock);              // ARP Request


  while (1)
    {
      printf ("----------\n");
      recvpack (sock);
    }

}

Thursday, July 28, 2011

Genesi - EFIKA Micro-Motherboard

http://www.genesi-usa.com/products/efika/5200b

Introducing utrace [LWN.net]

http://lwn.net/Articles/224772/

Maze - a new tool for debugging multiprocess and multithreaded programs

Maze - a new tool for debugging multiprocess and multithreaded programs

Hello everybody,

If you develop parallel programs on Linux, Maze may be the right tool for you. If you tend to be an early adopter of new technologies, this may be an interesting project for you as well!

Maze is a Linux-based deterministic environment for your program. It helps you to find and reliably reproduce concurrency bugs. It is easy to use and well-documented. It works out-of-the-box, you do not need to instrument or modify your program.

Please check it out at http://kloobok.com

Thank you!

Roni.

Using sed and awk to highlight console output.

Using ANSI escape sequences in ASCII code I can use awk to highlight lines.

This is really useful for scanning output from make or reading logs.

$ cat TestInput
sdfasd
This is a test abcd test abcd
asdfsd test sdfasdfas

sdfasdffetestasdfasdfas

sdfs
daf
sdf

$ cat highlight
awk '/test/ {print "\033[30;47m" $0 "\033[37;40m"}' TestInput
$ ./highlight

This is a test abcd test abcd
asdfsd test sdfasdfas
sdfasdffetestasdfasdfas
$

I can change the colors.

$ cat highlight
awk '/test/ {print "\033[32;41m" $0 "\033[37;40m"}' TestInput
$ ./highlight

This is a test abcd test abcd
asdfsd test sdfasdfas
sdfasdffetestasdfasdfas

$

Here is a list of color codes.

Terminal Color changing come in the form of  esc , ASCII Decimal 27, hex 1B octal 33
esc[background ; foreground m
It's important there be no spaces.
 
"\033[32;41m"
 so \033 sends escape,   32;41 is background and foreground and "m" is the command.

I can do the same trick with SED also.

 
[jsokol]$ cat highlight2
sed  's/test/\d27[32;41m\0\d27[37;40m/g' TestInput
[jsokol]$ ./highlight2
sdfasd
This is a test abce test aaxx
asdfsd test sdfasdfas 
 
sdfasdffetestasdfasdfas
 
sdfs
daf
sdf
 
[jsokol]$

Fwd: Riverbed Intros Cloud Storage Acceleration Business Unit / SANsymphony-V Offers Auto Tiering For Multi-Vendor Storage



---------- Forwarded message ----------
From: CRN Storage <CRN_Storage_Weekly1@newsletter.crn.com>
Date: Thu, Jul 28, 2011 at 10:59 AM
Subject: Riverbed Intros Cloud Storage Acceleration Business Unit / SANsymphony-V Offers Auto Tiering For Multi-Vendor Storage
To: sokol@videotechnology.com


Click here to visit: Channelweb
CRN Storage
NEWS AND REVIEWS

Riverbed Intros Cloud Storage Acceleration Business Unit
Riverbed is increasing the visibility of its Whitewater cloud storage accelerator appliance family with the unveiling of a new cloud storage acceleration business unit.

New SANsymphony-V Provides Auto Tiering Across Heterogeneous Storage Hardware
A new version of DataCore's SANsymphony-V storage virtualization software now allows auto tiering of data across multiple vendors' heterogeneous storage hardware.

DLP, Backup Drive Symantec's 'Strongest' Q1
Symantec's Enrique Salem reported that the company experienced the "strongest June quarter in history," propelled by strong sales in backup and recovery, DLP and managed security services.

HP Pledges Allegiance To OpenStack Cloud
HP said it has joined the OpenStack cloud project as a contributing member, making HP the latest major IT company to join the open source cloud initiative.

Intel Prepping SSD 320 Bug Fix
Intel has acknowledged that its SSD 320 solid state drives will sometimes report to the system BIOS on boot-up that it has only 8 MBs of capacity instead of the promised capacity of up to 600 GBs.

PMC-Sierra Releases 6-Gbps SAS/SATA Hardware RAID Controllers
PMC-Sierra is shipping a new entry-level series of 6-Gbps SAS/SATA hardware RAID controllers which feature an on-board high-speed DRAM memory cache.

tab front NEW ON CRN.COM tab end

The Daily App is a new blog from the CRN Test Center spotlighting the latest apps for Apple iPhone, Google Android and other mobile platforms. Come get your daily dose.

 
tab front CRN VIDEO tab end

RES Software's User Virtualization Play Bill Corrigan discusses RES Software's channel focus.

Wyse Pumps Up Desktop Virtualization Wyse's Jeff McNaught talks VDI, zero client for SMBs.

Review: BlackBerry PlayBook CRN Test Center Looks at Research In Motion's new tablet.

 

Click here to visit: Channelweb
 
THIS WEEK ON CRN
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Unity Technologies' Flash Day

Flash Day

Unity Technologies' Flash Day is designed to introduce Flash users to the Unity development platform. Flash Day will take place on Tuesday, September 27, the day before Unite 11 kicks off at The Stanford Court Renaissance Hotel in San Francisco. The event is free, but seats are limited, so sign up today.

When and Where?

September 27, 2011
The Stanford Court Renaissance (Map)
Stanford Ballroom
905 California Street
San Francisco, CA 94108


Unity is the development environment that gets out of your way, allowing you to focus on simply creating your game. Developing for web, mobile, or console? Unity is the tool for the job.

Unity is a cross platform development tool that lets you write code once and have it run across many platforms.
Mac OS, PC, Android, iPhone, Wii, Xbox., Playstation.






UNITY_STANDALONE_OSXPlatform define for compiling/executing code specifically for Mac OS (This includes Universal, PPC and Intel architectures).
UNITY_DASHBOARD_WIDGETPlatform define when creating code for Mac OS dashboard widgets.
UNITY_STANDALONE_WINUse this when you want to compile/execute code for Windows stand alone applications.
UNITY_WEBPLAYERPlatform define for web player content (this includes Windows and Mac Web player executables).
UNITY_WIIPlatform define for compiling/executing code for the Wii console.
UNITY_IPHONEPlatform define for compiling/executing code for the iPhone platform.
UNITY_ANDROIDPlatform define for the Android platform.
UNITY_PS3Platform define for running Play Station 3 code.
UNITY_XBOX360Platform define for executing XBbox 360 code.

Fwd: maui super-computer...

---------- Forwarded message ----------
From: Bill C
Date: Thu, Jul 28, 2011 at 12:27 PM
Subject: maui super-computer...
To: John Sokol <john.sokol@gmail.com>


ha ha... they made it out of lots of desktops..... 

maybe i go work on it.... i do miss working on super-computers, none around here ... 
  Hawaii is the new silly-con-valley ....  State grants for computer research and tax write offs too ....  way cool ....  aloha 



ADK: Android Open Accessory Development Kit

ADK
Android Open Accessory Development Kit

The Android 3.1 platform (also backported to Android 2.3.4) 
https://docs.google.com/present/view?id=dd7dnm9r_223hffbnvgc&pli=1

www.YLabz.com
Ash@YLabz.com

Wednesday, July 27, 2011

Building a one instruction computer.

http://hackaday.com/2011/07/27/building-a-one-instruction-computer

The Brainfuck Programming Language

http://www.muppetlabs.com/~breadbox/bf/

GNU Radio

GNU Radio

GNU Radio is a free software development toolkit that provides the signal processing runtime and processing blocks to implement software radios using readily-available, low-cost external RF hardware and commodity processors. It is widely used in hobbyist, academic and commercial environments to support wireless communications research as well as to implement real-world radio systems.

GNU Radio applications are primarily written using the Python programming language, while the supplied, performance-critical signal processing path is implemented in C++ using processor floating point extensions where available. Thus, the developer is able to implement real-time, high-throughput radio systems in a simple-to-use, rapid-application-development environment.

While not primarily a simulation tool, GNU Radio does support development of signal processing algorithms using pre-recorded or generated data, avoiding the need for actual RF hardware.

GNU Radio is licensed under the GNU General Public License (GPL) version 3. All of the code is copyright of the Free Software Foundation.

See more at:
http://gnuradio.org/redmine/projects/gnuradio/wiki


Here is a project that uses it.
Unlocking Wireless PC Locks

Tunneling SSH over HTTP(S)

Tunneling SSH over HTTP(S)

OpenVPN notes.

I am having some fun because the virtual server I am renting has no modules directory and so I am unable to get the tun/tap interfaces up.


$ sudo modprobe tun
FATAL: Could not load /lib/modules/2.6.18-028stab070.10/modules.dep: No such file or directory

$ uname -a
Linux 2.6.18-028stab070.10 #1 SMP Thu Oct 21 13:44:25 MSD 2010 x86_64 GNU/Linux

$ cat /etc/debian_version
lenny/sid

Not sure if I can make it run without getting those modules in place, alternately I make have to set up a physical host on a DSL line some place and open a port on the firewall. What a hassle.

UPDATE:
It's on parallels virtuoso VM and kernel modules are not  available to the Virtual host.
I had to chat with the Sysadmin of Tektonic.net ISP and he flipped some switch and suddenly
 /dev/net/tun started working. Even weirder is lsmod showed no modules loaded.

I want to take a look at Virtual Box and see if that also does some weirdness with Linux modules too.


Install and setup OpenVPN on Debian 4.0 Etch

Quick simple tutorial/howto on OpenVPN with Debian

http://openvpn.net/bridge.html

http://openvpn.net/INSTALL-win32.html

Monday, July 25, 2011

Boot To Gecko – Mozilla's Web-Based OS

From Slashdot:

"Mozilla has launched a new project called 'Boot to Gecko.' The aim of this project is to develop a complete operating system for the open web. Unlike Google's version of a web-based OS — the Chrome OS — Mozilla's version is not aimed at netbooks. With Boot to Gecko, Mozilla is aiming for smartphones – and Android forms a part of their plan."

Fwd: Tech Focus: Hardware languages for softies

I'd bet most software people realize that we are almost a the point of pure code to hardware design.

---------- Forwarded message ----------
From: "Embedded.com Newsletter" <Embedded@newsletters.eetimes.com>
Date: Jul 25, 2011 9:08 AM
Subject: Tech Focus: Hardware languages for softies
To: <sokol@videotechnology.com>

»Click here to view online I »Forward to a friend I »Sign up for an EE Times Newsletter

Share this Newsletter:

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July 25, 2011

Tech Focus: Hardware languages for softies

HIGHLIGHTS

A guide to VHDL for embedded software developers: Part 1 – Essential commands

Using SystemC to build a system-on-chip platform

The four Rs of efficient system design

Compiling software to gates


Editor's Note

Bernard Cole Bernard Cole
Site Editor
Embedded.com
bccole@acm.org
Read his blog

Every once in a while I find myself caught in the crossfire of debates between embedded systems developers about the pros and cons of C versus C++, C/C++ versus Java, or model-driven versus model-based software design frameworks. At those times I try to remember the advice of Embedded.com columnists Jack Ganssle and Michael Barr: there are no good languages or bad ones, just imperfect languages that may be more or less suitable to the task at hand.

One area where such advice should also be heeded is where the dichotomy is the widest. That is the one between developers using languages such as C or C++ to write software programs to run on microprocessors and those who use hardware design languages to build the actual gates and logic for the CPU, ASIC or FPGA hardware.

This is ironic because, in an effort to make hardware design easier for both hardware and software designers, the industry has borrowed heavily from software languages. The original VHDL for ASICs and FPGAs borrows heavily from Ada, Verilog is based on C, SystemC borrows heavily from C++, and Handel-C uses a rich subset of C. There is even a hardware language based on Java, called Lava, and another called MyHDL which used the Python Web programming language to generate either Verilog or VHDL descriptions.

So when you get right down to it even the hardware is software and developers in both worlds face the same sets of challenges: writing the code, compiling, debugging, simulating and verifying it. And, now, there are frameworks such as ESL, which abstract the design process to the system level.

In this issue of the Tech Focus newsletter is a selection of articles written over the past few years to help reluctant software developers make the transition. Of these, my Editor's Top Picks are:

A guide to VHDL for software developers
Design languages for embedded systems
Transitioning from C/C++ to SystemC

With the emergence of such things as FPGAs with integrated CPU cores and processors with FPGA blocks, the boundary between hardware and software will become even more indistinct. This makes it more important than ever to have the skills to move back and forth as easily as possible.


Design How-Tos

A guide to VHDL for embedded software developers: Part 1 – Essential commands

A series of three articles for embedded software developers unfamiliar with VHDL that is designed to give concise and useful summary information on important language constructs and usage - helpful and easy to use, but not necessarily complete. Part 1: Essential commands.

Using SystemC to build a system-on-chip platform

How Texas Instruments' designers used the SystemC hardware design language to do performance modeling when creating both the company's OMAP-2 platform and the devices based on it.

Transitioning from C/C++ to SystemC in high-level design

It's far easier to do architecture design in SystemC than it is to do it in C and C++. If co-designing hardware and software using high-level design methods, much of your work will be done in an architecture design phase in SystemC. Here's why.

Design Languages for Embedded Systems

Synopsys' Stephen A. Edwards provides a short tutorial on the basics of some of the most important languages, along with examples of each, that will help you decide which one to investigate for your particular embedded application.

Accelerating algorithms in hardware

When you're trying to get the best performance out of your algorithm and you're out of software tricks, try acceleration through hardware/software repartitioning. FPGAs provide everything you need to speed up your algorithms. Lara Simsic shows you how.

Compiling software to gates

Are VHDL and Verilog past their prime, soon to be replaced by C-like design languages such as System C, Handel-C, and others? Professor Ian Page thinks a change is at hand.

The four Rs of efficient system design

New design languages and new chips and systems mean a whole new set of design gotchas for today's developers. Once-simple tasks become difficult and, thankfully, once-difficult tasks become easy. This article for senior designers looks at newer high-level design techniques and how they can improve logic and system design.

Taking System Design to a Higher Level

Keys to raising the design level are the availability of different design methodologies coupled with design tools that can navigate designs at abstraction levels above RTL.

FPGA programming step by step

FPGAs and microprocessors are more similar than you may think. Here's a primer on how to program an FPGA and some reasons why you'd want to.

The art of FPGA construction

Working with FPGAs isn't intimidating when you know the basic techniques and options.

Hardware Design Requires Hardware Design Languages

While languages such as C++ can help in the creation of high-level models of hardware, Sean Dart argues that hardware engineers need specific language constructs in languages such as SystemC that allow them to express their intent in the most accurate and productive manner.

Accellera VHDL Standard

The article describes the salient features of the Accellera VHDL STandard 1076-2006-D3.0

An overview of SystemVerilog 3.1

SystemVerilog 3.1 adds a number of features to the Verilog-2001 standard that facilitate modeling and verification of large systems. In this tutorial, consultant Stu Sutherland provides an overview of some of the more significant new features, and argues that SystemVerilog is ready for adoption and use.

Address system-level HW/SW design tasks with Electronic System Level tools

To keep track of design size and complexity, designers are now looking for the next breakthrough in design productivity, implementation and verification. One answer may be electronic system level design.


Embedded Systems Bookshelf

Excerpts

Embedded Books Reading Room
Bernard Cole's favorite links to book excerpts.

Reviews

Engineer's Bookshelf
Airport fiction blows. A look at books other engineers are reading and why you should read them, too. Recommend and write a review yourself. E-mail Brian Fuller.

Jack Ganssle's Bookshelf
A list of book reviews by Jack Ganssle, contributing technical editor of Embedded Systems Design and Embedded.com.

Max's Cool Beans
Clive "Max" Maxfield, the editor on Programmable Logic DesignLine, often writes about interesting books.


Products

Mentor extends embedded design into ESL

Common Embedded Software Development Platform integrates electronic system level (ESL) capabilities into CodeSourcery tools to support development from virtual prototypes to hardware emulation and boards.

New ESL platform claimed to cut design times in half

Agilent Technologies' new electronic system-level (ESL) EDA platform is said to help algorithm developers and system architects cut design time in half.

CoFluent bridges gap from UML to SystemC

French ESL company CoFluent Design (Nantes, France) claimed it has developed a methodology that combines the OMG's (Object Management Group) standards UML (Unified Modeling Language), SysML (System Modeling Language) and MARTE (Modeling and Analysis for Real-Time and Embedded Systems) profiles.

SystemC synthesis tool adds improved C++ support

Celoxica Holdings said it has enhanced C++ coding support in its Agility Compiler high-level design tool, raising the level of design abstraction above SystemC for designers who need to boost productivity and for programmers less familiar with hardware design.

C/C++ to VHDL for $995

Will C/C++ become a standard for modelling hardware and software systems?

HDL Designer Series Supports SystemVerilog

Mentor Graphics Corporation announced that its HDL Designer Series product has been extended to provide a platform for implementing SystemVerilog.


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Commentary

Verilog versus VHDL (which is best?)

A reader who knows a little Verilog and a little VHDL is trying to plot his future course; which language should he learn in detail?

Three cool beginners' books on VHDL

While responding to a question from a student, I discovered the answer in our very own Programmable Logic DesignLine forums.

The ESL dilemma

When ESL first started to emerge I knew it would apply here as well, but was unsure about the outcome. Would Mentor, Synopsys, and Cadence fall into insignificance?

Does ESL need another language?

Systems architects need to describe the requirements and architecture of a system without the limits imposed by a presumed implementation choice. Some of the projects aiming to develop a true architectural language for the ESL market show both technical and financial promises.

Is EDA stuck between a rock & a soft place?

The dilemma facing IC designers & suppliers of EDA hardware tools as they struggle to meet the software demands of new designs can best be described as being caught "between a rock and a soft (ware) place."

Is low power driving move to integrated HW/SW codesign?

While many pressures are driving embedded developers to higher level tools to integrate hardware/software design, debug and verification, is the most potent factor the need for lower power designs that do not sacrifice performance?


Sponsored White Papers

VHDL Coding Style to Infer LatticeECP2 sysDSP Blocks with Precision

Off to the Races with Your Accelerated SystemVerilog Testbench

Introduction to Verilog

Overview of Digital Design with Verilog HDL

Digital System Design Automation with Verilog

Using System Generator for Systematic HDL Design, Verification, and Validation


Courses and Webinars

Harness the Power of SystemVerilog with Design Compiler to Increase Productivity

ESC SV-282- A Methodology for Successful VHDL-Based FPGA Design

Fundamentals of ESL Synthesis

ESC SV-283- Making System-Level Hardware and Software Tradeoffs

Conquer FPGA Design Complexity with System-Level Integration


Resources

Around the Network Events

VHDL design projects (VIDEOS!!)

Verilog design projects (VIDEOS!!)

ESC Silicon Valley 2011: THE VIDEO!!

Embedded.com Newsletters (BACK ISSUES)


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Conferences and Events

ESC Boston 2011
Conference: September 26-29
Expo: September 27 & 28

Register now for the All Access Pass and receive a BeagleBoard-xM and eZ430 Chronos watch, as well as exclusive access to: DesignCon East, DesignMED and Designing with LEDs!  Expo Pass registration is FREE.

Check out what's new with ESC Boston:

Don't miss your opportunity to attend the hottest embedded event of the Fall.

Register Now!

* Available to the first 40 people who register for the All Access Pass only. Must attend to receive.


News & Analysis

The evolution of design methodology

In nature, long periods of relatively stable environments are occasionally punctuated by large-scale changes that are the catalyst for evolution to create a large variety of mutations, and then for natural selection to weed out the unsuccessful ones. The environment in which design methodology lives is similar.

Evolution of design methodology II: The re-aggregation era

Part two of the two-part essay co-authored by Paul McLellan and Jim Hogan about evolving design methodology and how it will change the industry.

The ESL battle for hearts and minds

Things have turned deadly serious this week between two major players in the ESL market, Mentor Graphics and Forte Design Systems.

ARM, Xilinx to collaborate on programmable systems

FPGA vendor Xilinx Inc. (San Jose, Calif.) and ARM Holdings plc (Cambridge, England) have announced they are collaborating to enable ARM processor and interconnect technology to be implemented within Xilinx FPGAs.

Altera, MIPS roll FPGA-optimized soft processor

Altera, MIPS Technologies and System Level Solutions introduced a MIPS-based FPGA optimized soft processor for use on Altera's FPGAs and ASICs to create solutions for networking, video and digital signal processing applications.

ARM, Actel combine forces on soft 'Thumb' for FPGA

U.S. FPGA vendor Actel Corp. has struck a deal with processor IP licensor ARM Holdings plc whereby Actel customers are to set to be able to implement a soft ARM7 Thumb microprocessor on a range of ARM technology-enabled FPGAs due to come out some time in 2005.

Cypress plans bigger, faster, cheaper PSoC chips

Lifting the covers a bit on Cypress Microsystems' road map for its unique PSoC family of programmable embedded devices, director of strategic marketing Nathan John recently announced that the company will release three new subfamilies of PSoC parts by the end of this year, all extensions of the current PSoC architecture.


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